The process for producing a semiconductor includes a step of forming, on a silicon wafer, a plurality of to-be-processed film layers each made of a substance having different properties, in a given order and subjecting the to-be-processed films to given patterning. The patterning of each to-be-processed film is conducted by first forming, on the surface of the
to-be-processed film, a resist film made of a photosensitive substance (a resist), applying a light on given parts of the resist film, then removing the exposed or unexposed parts of the resist film by a development procedure to form a resist pattern, further dry-etching the to-be-processed film using the resist pattern as an etching mask.
In such a process, an ultraviolet light (e.g. an ArF excimer laser) is used as a light source for applying a light on the resist film. Currently, the demand for making finer the large scale integrated circuit (LSI) is becoming increasingly higher and there are cases that the required resolution is the wavelength of exposed light or less. A resolution of the wavelength of exposed light or less is undesirable because there is a shortage in light exposing process tolerance such as exposure amount tolerance, focus tolerance and the like. In order to make up the shortage in exposure process tolerance, it is effective to make small the thickness of the resist film and increase the resolution. However, a reduction in the thickness of the resist film makes it difficult to secure a resist film thickness required in the etching of the to-be-processed film.
Hence, there is being investigated a process which comprises forming, on the surface of a to-be-processed film, a resist lower layer film (hereinafter, this film may be expressed simply as “lower layer film”), transferring a resist pattern once onto the lower layer film to form a lower layer film pattern, and then transferring the resist pattern onto the to-be-processed film using the lower layer film pattern as an etching mask. The lower layer film used in this process preferably has an etching resistance; therefore, it has been proposed to form a lower layer film by using a composition which contains an acenaphthylene skeleton-containing polymer capable of absorbing the energy in etching and exhibiting an etching resistance (see, for example, Patent Literatures 1 to 3).
In an LSI pattern rule having a fineness of 0.13 μm or less, the influence of wiring delay on the high speed of LSI is larger and it is difficult to achieve a higher performance of LSI by using the current process technique of LSI. Hence, it is being investigated to change the wiring material from Al to Cu in order to reduce the wiring delay.
Dual damascene process is known as a technique for changing the wiring material from Al to Cu (see, for example, Patent Literature 4). In this process, a substrate of large aspect ratio (unevenness) needs to be used as compared with when Al is used as the wiring material; and the composition used for formation of resist lower layer film is required to have a property of being easily filled in the gaps of the substrate, i.e. a superior filling property.
In order to improve the filling property of the composition for formation of resist lower layer film, there are known, for example, a method of allowing the resin contained in the composition, to have a molecular weight of 3,000 or less (see, for example, Patent Literature 5); a method of allowing the composition to have a coefficient H indicated by [logarithmic change of viscosity (mPas)]/[change of solid content (mass %)], of 0.06 or less and a viscosity measured at a solid content of 25 mass %, of 1 to 80 mPas (see, for example, Patent Literature 6); and a method of compounding, in the composition, a nitrogen-containing compound (a crosslinking agent) having a molecular weight of 800 or less (see, for example, Patent Literature 7).    Patent Literature 1: JP-A-2000-143937    Patent Literature 2: JP-A-2001-40293    Patent Literature 3: JP-A-2004-168748    Patent Literature 4: U.S. Pat. No. 6,057,239    Patent Literature 5: JP-A-2000-294504    Patent Literature 6: JP-A-2003-057828    Patent Literature 7: JP-A-2002-329781